1. Field of the Invention
This invention relates generally to metal-oxide-semiconductor (MOS) switching devices of the type used in switched capacitor filters and related circuits. More particularly, the invention is directed to a novel three-terminal integrated circuit (IC) switching structure in which undesirable parasitic transistor action and undesirable shifts in the threshold or turn-on voltage of the MOS device or devices have been eliminated.
2. Description of Related Art
In the manufacture of certain types of MOS integrated circuit switching circuits, such as switched capacitor filters, it is necessary to fabricate a switching device in a semiconductor substrate and isolate the device in a p type or n type "well" which has been ion implanted and diffused into the substrate using state-of-the-art ion implantation and/or diffusion techniques. This construction is necessary in order to electrically isolate these switching devices from other devices which are part of a monolithic integrated circuit built in a common semiconductor substrate. These MOS switching devices may also function as an input device of an analog sample-and-hold (S/H) circuit, or as a series-connected devices known as a "transmission gate" in a logic circuit.
In all of the above types of switching circuits, the MOS switch will normally function quite satisfactorily in the "on" or conductive state. However, after the MOS switching device is turned off, the input or output node of the device may be driven too far negative or to far positive with respect to the potential of the well region which isolates the device in a common substrate. In one direction, this excessive voltage swing will, in turn, forward bias the input or output pn junction of the MOS switch and, in turn, produce parasitic transistor action, for example, between an n type substrate, a p type isolating well and the n type source or drain region of the MOS field-effect transistor (MOSFET). Typically, the undesirable parasitic bipolar transistor action in the above n-p-n regions may have a gain or beta, .beta., of 200 and may produce as much as 10 milliamps of parasitic current drain for a forward bias of 700 millivolts of a source or drain region with respect to its isolating well.
It is possible to eliminate this undesirable parasitic transistor action by applying a predetermined reverse DC bias potential to the p or n type well and thus prevent the input or output (source or drain) pn junction of the MOS device from becoming forward biased. However, the application of a reverse bias potential to the well region, in turn, introduces a corresponding undesirable increase in threshold or turn-on voltage for the device. This threshold increase is commonly known as the "source-bulk" or "source-body" voltage effect. An additional terminal for the well device must be provided and connected by a conductive path to a source of reverse bias DC potential. These disadvantages, including the above undesirable parasitic transistor action, will be better understood in the description that follows below with reference to the prior art circuitry and structure shown in the drawings.